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We are looking for experienced SoC Verification Engineers with strong hands-on expertise in SystemVerilog / UVM and solid understanding of SoC protocols and verification methodologies.
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β’ Strong hands-on experience with SV / UVM
β’ Good understanding of AXI4, PCIe, Ethernet, NoC, UCIe
β’ Experience in testbench development & UVM test case coding
β’ Solid understanding of coverage closure
β’ Knowledge of encryption & decryption is a plus
